# Doctoral Focal Award: Chip Design and Verification

**Funder:** UKRI
**Duration:** 4 years full-time equivalent (up to 5 years with justification)
**Consortium:** Required - lead organisation plus collaborating organisations and industry project partners providing minimum 20% cash contribution to studentship costs
**Application:** Panel assessment followed by interview for shortlisted applicants; EPSRC makes final funding decision
**Eligible countries:** GB
**Official call:** https://www.ukri.org/opportunity/doctoral-focal-award-chip-design-and-verification/
**Last updated:** 18 Oct 2026

## Eligibility & scope

Doctoral training programme for UK higher education institutions, research council institutes, eligible independent research organisations, Catapult centres and PSREs to train cohorts of at least 10 doctoral students in chip design, verification and advanced compute. Requires industry partners providing minimum 20% cash contribution and access to EDA tools/infrastructure.

## Summary

The EPSRC Doctoral Focal Award for Chip Design and Verification funds a doctoral training centre covering VLSI design, compute architecture and AI hardware, open only to UK organisations. The award requires substantial industry co-creation, including placements, shared supervision and access to industry infrastructure, making it suited to departments with established semiconductor or hardware industry partnerships.

## Who should apply

- UK academic organisations hosting or proposing a doctoral training centre
- Research groups working in VLSI design, compute architecture or AI hardware
- Departments with existing or committed industry partners for co-designed projects
- Applicants able to offer shared supervision, placements and industry infrastructure access

## Key dates

- Interviews expected week beginning 25 January 2027 for shortlisted applicants
- Panel assessment followed by interview, with EPSRC making the final funding decision

## Tips for applicants

- Secure named industry partners before submitting; the call requires central, not peripheral, industry co-creation including placements and shared supervision.
- Prepare for the interview stage by rehearsing how the centre's governance will actually share supervision between academic and industry staff.
- Detail concrete infrastructure access arrangements with industry partners rather than describing them in general terms, since this is a specific eligibility requirement.

## Frequently asked questions

### What does the EPSRC Doctoral Focal Award fund?

It funds a doctoral training centre in chip design and verification, spanning VLSI design, compute architecture and AI hardware.

### Who can apply for the EPSRC Doctoral Focal Award?

Only UK organisations are eligible, and applicants must demonstrate substantial industry co-creation such as placements and shared supervision.

### Is a consortium required for this EPSRC award?

Yes, industry partners are required to play a central role through co-designed projects, placements and shared supervision.

### What are the application stages for this award?

Applications go through panel assessment followed by an interview for shortlisted applicants, with EPSRC making the final funding decision.

### When are interviews for the EPSRC Doctoral Focal Award?

Interviews are expected in the week beginning 25 January 2027.

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Source: [The Great Grantsby](https://grantsby.eu/grants/epsrc-doctoral-focal-award-chip-design-and-verification-2026) — EU grant monitoring for academic researchers. Always verify details on the funder's website before applying.

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